gX"dZddlmZddlmZmZmZmZddlZddl m Z m Z ddl m Z ddlmZddlmZd d lmZmZmZd d lmZd d lmZmZmZmZerdd lmZdZGddeZ GddeZ!GddZ"GddZ#dS)z8Circuit operation representing an ``if/else`` statement.) annotations)OptionalUnionIterable TYPE_CHECKINGN)ClassicalRegisterClbit)expr)InstructionSet) CircuitError)ControlFlowBuilderBlockInstructionPlaceholderInstructionResources) ControlFlowOp)partition_registersunify_circuit_resourcesvalidate_conditioncondition_resourcesQuantumCircuit)IfElseOpceZdZdZ ddfd Zed Zed ZejdZejdZedZ ddZ dZ xZ S)raA circuit operation which executes a program (``true_body``) if a provided condition (``condition``) evaluates to true, and optionally evaluates another program (``false_body``) otherwise. If provided, ``false_body`` must be of the same ``num_qubits`` and ``num_clbits`` as ``true_body``. The classical bits used in ``condition`` must be a subset of those attached to the circuit on which this ``IfElseOp`` will be appended. N condition=tuple[ClassicalRegister, int] | tuple[Clbit, int] | expr.Expr true_bodyr false_bodyQuantumCircuit | Nonelabel str | Nonecddlm}t||s tdt |d|j}|j}td||||g|t||_ dS)a Args: condition: A condition to be evaluated in real time during circuit execution which, if true, will trigger the evaluation of ``true_body``. Can be specified as either a tuple of a ``ClassicalRegister`` to be tested for equality with a given ``int``, or as a tuple of a ``Clbit`` to be compared to either a ``bool`` or an ``int``. true_body: A program to be executed if ``condition`` evaluates to true. false_body: A optional program to be executed if ``condition`` evaluates to false. label: An optional label for identifying the instruction. rrLIfElseOp expects a true_body parameter of type QuantumCircuit, but received .if_elserN) qiskit.circuitr isinstancer type num_qubits num_clbitssuper__init__r _condition) selfrrrrrr)r* __class__s X/granary/edev/quantum/lib/python3.11/site-packages/qiskit/circuit/controlflow/if_else.pyr,zIfElseOp.__init__6s* 211111)^44 K84HccLUK_ccc   !j.99 "H484D4DHHH $77:;PTXTc;c;c"i37?iiEI_ii9C8MiiQ[Peiii":. r1cl|jd|jdfS|jd|jdfS)Nr r)r6r5s r0blockszIfElseOp.blockss4 ;q> !KN$ $KNDKN3 3r1r?Iterable[QuantumCircuit]return 'IfElseOp'cdtj|tddD\}}t|j|||jS)aReplace blocks and return new instruction. Args: blocks: Iterable of circuits for "if" and "else" condition. If there is no "else" circuit it may be set to None or omitted. Returns: New IfElseOp with replaced blocks. c3 K|] \}}|V dSr3).0ablock_s r0 z*IfElseOp.replace_blocks..s7! !  vqF! ! ! ! ! ! r1N) fillvalue)rr) itertools zip_longestrangerr-r)r.r?rrs r0replace_blockszIfElseOp.replace_blockss]! ! $-$9&%((VZ$[$[$[! ! !  :zQUQ[\\\\r1c td)NzjIfElseOp cannot be classically controlled through Instruction.c_if. Please nest it in an IfElseOp instead.NotImplementedErrorr. classicalvals r0c_ifz IfElseOp.c_ifs! 5   r1)NN)rrrrrrrr )r?r@rArB) __name__ __module__ __qualname____doc__r,propertyr6rsetterr?rOrV __classcell__r/s@r0rr*s   -1 $8$8$8$8$8$8$8LXX    ]#/#/]#/J44X4 ]]]]        r1rcVeZdZdZ ddddfd ZddZdZddZdZdZ dZ xZ S)IfElsePlaceholderaA placeholder instruction to use in control-flow context managers, when calculating the number of resources this instruction should block is deferred until the construction of the outer loop. This generally should not be instantiated manually; only :obj:`.IfContext` and :obj:`.ElseContext` should do it when they need to defer creation of the concrete instruction. .. warning:: This is an internal interface and no part of it should be relied upon outside of Qiskit Terra. Nr%rr true_blockr false_blockControlFlowBuilderBlock | Noner Optional[str]c&||_||_||_t dt |jjt |jjg|t||_ dS)a Args: condition: the condition to execute the true block on. This has the same semantics as the ``condition`` argument to :obj:`.IfElseOp`. true_block: the unbuilt scope block that will become the "true" branch at creation time. false_block: if given, the unbuilt scope block that will become the "false" branch at creation time. label: the label to give the operator when it is created. r$r%N) _IfElsePlaceholder__true_block_IfElsePlaceholder__false_block _calculate_placeholder_resources_IfElsePlaceholder__resourcesr+r,lenqubitsclbitsrr-)r.rrarbrr/s r0r,zIfElsePlaceholder.__init__s$'@K@@BB  s4+233S9I9P5Q5QSU]b    -Y77r1rA'IfElsePlaceholder'c|jtd|j|j}||z}||z}|||z |||z t||j|||j S)aReturn a new placeholder instruction, with the false block set to the given value, updating the bits used by both it and the true body, if necessary. It is an error to try and set the false block on a placeholder that already has one. Args: false_block: The (unbuilt) instruction scope to set the false body to. Returns: A new placeholder, with ``false_block`` set to the given input, and both true and false blocks expanded to account for all resources. Raises: CircuitError: if the false block of this placeholder instruction is already set. Nzfalse block is already set to r%) rgr rfcopyrkrladd_bitsr(r-r)r.rbra true_bits false_bitss r0with_false_blockz"IfElsePlaceholder.with_false_blocks   )T@RTTUU U&++-- %%''**;*;*=*==  ''))K,>,>,@,@@ J2333Y3444tDzz$/:{$*UUUUr1c~|j|jjS|jj|jjzS)z.Get the registers used by the interior blocks.)rgrf registersror5s r0ruzIfElsePlaceholder.registerss:   %$.3355 5 *T-?-IIIr1rc 4|jt|jj\}}t t |jt |jt |t |St|jj\}}t|jj\}}t t |j|jzt |j|jzt |t |zt |t |zS)aCGet the placeholder resources (see :meth:`.placeholder_resources`). This is a separate function because we use the resources during the initialization to determine how we should set our ``num_qubits`` and ``num_clbits``, so we implement the public version as a cache access for efficiency. Nrkrlqregscregs)rgrrfrurtuplerkrl)r.rxry true_qregs true_cregs false_qregs false_cregss r0rhz2IfElsePlaceholder._calculate_placeholder_resourcessV   %.t/@/JKKLE5'T.557788T.557788EllEll   "5T5F5P!Q!Q J#6t7I7S#T#T [#*1133d6H6O6O6Q6QQRR*1133d6H6O6O6Q6QQRR ##eK&8&88 ##eK&8&88     r1c|jSr3)rir5s r0placeholder_resourcesz'IfElsePlaceholder.placeholder_resources s r1c |j}|j}|j8||jz}||jz}||z}||z}||z rt d||z |j||}|jd}n-t ||j||f\}}|t|j |||j tt|jt|jt|j t|jfS)Nz*>9+Y-=++D ' ' #(():):)<)O>O>Q>QRRI*.-*>*>I$VZVabbbi&''i&''++D ' ur1)rrrrrrrr )rAr)rAr)rAr)rAr) rWrXrYrZ __slots__r,r[rrrrrrrEr1r0rr<s"[I!       $XX+++X+ X!!!r1rc*eZdZdZdZd dZdZdZdS) raCA context manager for building up an ``else`` statements onto circuits in a natural order, without having to construct the statement body first. Instances of this context manager should only ever be gained as the output of the :obj:`.IfContext` manager, so they know what they refer to. Instances of this context are "friends" of the circuit that created the :obj:`.IfContext` that in turn created this object. The context will manipulate the circuit's defined scopes when it is entered (by popping the old :obj:`.IfElseOp` if it exists and pushing a new scope onto the stack) and exited (by popping its scope, building it, and appending the resulting :obj:`.IfElseOp`). .. warning:: This is an internal interface and no part of it should be relied upon outside of Qiskit Terra. _if_instruction _if_registers _if_context_used if_contextrc>d|_d|_||_d|_dS)NFr)r.rs r0r,zElseContext.__init__s' $!% r1c<|jrtdd|_|jj}|jj}|tdt |dkrtd|d}|}|j|jurtd|d|d ||_ t|j jtr\t|j jj dj|j jj dj|_n#|j j|_||j j|j j|j|jj dS) Nz Cannot re-use an 'else' context.Tz;Cannot attach an 'else' branch to an incomplete 'if' block.r z4Cannot attach an 'else' to a broadcasted 'if' block.rzTThe 'if' block is not the most recent instruction in the circuit. Expected to find: z, but instead found: r#)rur)rr rrrrj#_peek_previous_instruction_in_scoper"_pop_previous_instruction_in_scoperr'rsetr?ryunionrxrrurrkrlr)r.rrappended instructions r0rzElseContext.__enter__s : CABB B $ 0 F"* (\]] ] $ % % * *UVV V(+AACC  [%: : :X&.XXGRXXX  'IIKK d*4h ? ? L!$T%9%C%J1%M%S!T!T!Z!Z$.5a8>""D  "&!5!?!I!I!K!KD   '  '((0      r1c4|jj}|7|||jd|_dS|}t |jjtrU|jj |}| }| ||j |j n|jjjd}|| | } t!|| f\}} | t#|jj|| |jjjt)|j t)|j dS)NFrr%)rrr_appendrrr'rr`rsrrrkrlr?rrrrrrz) r.rrrrrb if_operationrrrs r0rzElseContext.__exit__s~"*      OOD0 1 1 1DJ5((**  d*46G H H /9JJ;WWL$::<  i&''i&''   ur1N)rr)rWrXrYrZrr,rrrEr1r0rrsY MI   @&&&&&r1r)$rZ __future__rtypingrrrrrL qiskit.circuit.classicalregisterrr qiskit.circuit.classicalr qiskit.circuit.instructionsetr qiskit.circuit.exceptionsr builderrrr control_flowr_builder_utilsrrrrr&r__all__rr`rrrEr1r0rs?>"""""";;;;;;;;;;;;EEEEEEEE))))))888888222222ZZZZZZZZZZ''''''.------      }   DM M M M M .M M M `^^^^^^^^Bbbbbbbbbbbr1